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Best Place To BuildThis Indian Startup is Reinventing Chip Design | Neel Gala, CTO/Co-Founder, InCore Semiconductors
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At a glance
WHAT IT’S REALLY ABOUT
InCore uses RISC-V and generators to accelerate custom chip design
- The conversation demystifies what microprocessors, cores, subsystems, and SoCs are, and why chip development is slow, expensive, and uniquely risk-averse compared to software.
- Neel traces Shakti’s genesis at IIT Madras: limited access to modern proprietary ISAs pushed the team toward the emerging, simpler RISC-V ecosystem and an “if it doesn’t exist, build it” mindset.
- InCore positions itself as an IP and subsystem/SoC solutions company, emphasizing that customers buy usable, integrated building blocks—not just a CPU core—and that IP delivery is largely “software” (RTL) with practical protection trade-offs.
- The company’s SoC generator approach aims to cut the spec-to-RTL-freeze phase from months to weeks/days by enabling rapid PPA (power-performance-area) iteration and providing day-one collateral for software, emulation, and verification.
- RISC-V is framed as a global “open opportunity” that breaks ISA monopolies and enables Indian strategic autonomy, while AI is described as a useful co-pilot but not yet trustworthy enough to replace humans in chip generation due to data scarcity and hallucinations.
IDEAS WORTH REMEMBERING
5 ideasChip design is slow because failure is catastrophically expensive.
A single bug can invalidate a multi-million-dollar prototype and restart a 12–18 month cycle, which drives heavy verification and a deeply risk-averse culture unlike “fail fast” software.
ISAs are the choke point of hardware–software control.
Neel explains instruction sets as the shared “language” between hardware and software; keeping them proprietary enables ecosystem lock-in, licensing constraints, and monopoly-like market power.
RISC-V matters because it’s permissionless, not just open.
RISC-V’s small base (dozens of instructions) and non-copyleft openness lowers barriers for new entrants to implement, customize, and commercialize without paying for ISA access or fearing restrictive clauses.
A CPU core alone rarely sells; integrated subsystems win deals.
InCore’s thesis is that customers want a near-product SoC/subsystem—interconnect, peripherals, controllers, security, accelerators—so they can build chips quickly without stitching everything from scratch.
SoC generators turn architecture exploration into rapid iteration.
By making SoC composition and trade-offs (PPA) configurable—down to “YAML-like” changes—teams can do many design iterations in days/weeks instead of weeks/months of manual RTL edits and reintegration.
WORDS WORTH SAVING
5 quotesImagine a chip which has a million transistors. You have to ensure that all million of them are working.
— Neel Gala
You spend $5 million getting the first prototype and it doesn't boot… Instead of 'Hello, world,' it says, 'Bye, bye, world.'
— Neel Gala
Innovation warrants curiosity, but curiosity warrants funding, warrants resources.
— Neel Gala
The transition… what academia teaches you to think is what's possible. What entrepreneurship demands you to think is what's needed.
— Neel Gala
RISC-V, beyond an open standard, is an open opportunity.
— Neel Gala
High quality AI-generated summary created from speaker-labeled transcript.
