OpenAIOpenAI x Broadcom — The OpenAI Podcast Ep. 8
CHAPTERS
- 0:00 – 3:20
OpenAI–Broadcom partnership: custom chip + full system for AI at massive scale
The hosts reveal a new partnership between OpenAI and Broadcom focused on building a custom chip and, increasingly, an entire end-to-end system. Sam Altman frames it as a vertically integrated effort—from transistor design to the user-facing token output—to expand capacity for advanced AI services.
- •Announcement of an OpenAI–Broadcom partnership underway for ~18 months
- •Designing a custom chip tailored to OpenAI workloads
- •Scope expands from chip to full system design due to growing complexity
- •Goal: significantly increase inference capacity for global demand
- •Vertical optimization across the stack as a central strategy
- 3:20 – 5:16
What “10 gigawatts” means: demand growth and vertical efficiency gains
The conversation unpacks the meaning of deploying 10 incremental gigawatts of AI racks and why it’s still not enough. Sam explains how full-stack optimization can reduce cost and increase performance, but also how efficiency gains tend to unlock even greater demand.
- •10 GW is incremental capacity on top of existing data center and silicon partnerships
- •End-to-end optimization yields “huge efficiency gains” (cheaper/faster models)
- •Observed pattern: 10× efficiency can trigger ~20× demand growth
- •Expectation that the world will rapidly absorb low-cost, high-quality intelligence
- •Examples of increased usage: code, enterprise automation, Sora video generation
- 5:16 – 9:27
How collaboration accelerates chip innovation (including AI-assisted design)
Greg and Charlie describe how OpenAI’s workload knowledge and Broadcom’s hardware expertise combine to move unusually fast. Greg highlights using OpenAI models to assist chip design, compress schedules, and find optimizations that would take human experts much longer to surface.
- •OpenAI can’t build chips alone; partnership is essential for execution
- •AI models used to propose chip optimizations and reduce area
- •Human experts often validate optimizations later—AI speeds discovery timing
- •Shift from interactive chat to always-on agents drives new compute needs
- •Long-term vision: compute access broad enough that everyone can benefit
- 9:27 – 13:13
AI infrastructure as a civilization-scale industrial project (and a new “utility”)
The group compares AI build-out to railroads and the internet, arguing it’s becoming critical infrastructure for billions. They emphasize that reaching this scale requires many companies and countries, plus more open standards and ecosystem-wide collaboration.
- •AI infrastructure may be the largest joint industrial project in human history
- •A 1-GW data center feels like a “tiny city” in complexity and scale
- •Broadcom frames the effort as building civilization’s next “operating system”
- •Need for cross-ecosystem collaboration—no single party can do it alone
- •Importance of standardization and openness to support global utility-scale AI
- 13:13 – 15:22
Why build custom chips now: serving underserved workloads and controlling destiny
Greg and Hock explain the motivation for OpenAI to design chips: aligning hardware to specific workloads where general-purpose solutions fall short. Custom silicon provides leverage over roadmap, efficiency, and performance as AI systems mature and requirements become clearer.
- •Project pace: ~18 months of rapid progress with new hiring and expertise
- •Targeting specific workloads that are underserved by existing chips
- •Vertical integration helps realize future needs that partners may not prioritize
- •Custom chips help “control your own destiny” in supply and capability
- •Workload-driven design is positioned as a key differentiator
- 15:22 – 17:01
Workload-specific optimization: training vs inference and the importance of networking
Hock details how chip design choices differ between training and inference, and why cluster-level performance depends on networking as much as compute. The chapter underscores that OpenAI’s needs span more than a single chip: it’s a platform and system problem.
- •Training emphasizes raw compute (TFLOPS) plus high-performance networking
- •Inference often benefits from more memory and memory bandwidth per compute
- •Clusters—not individual chips—define real-world AI capability
- •System platform built end-to-end is framed as the path to most effective models
- •Roadmap implies multiple generations of specialized chips over time
- 17:01 – 20:18
“Melt sand, run energy, get intelligence”: intelligence-per-watt and GPUs vs custom systems
Sam reframes the goal as maximizing intelligence per unit energy, anticipating power as a limiting factor. The group acknowledges GPUs’ remarkable flexibility for research while explaining why optimized systems can extract more performance per watt as the future shape becomes clearer.
- •Core goal: maximize “intelligence per watt” across model→chip→rack
- •Energy/power expected to become a gating constraint
- •GPUs praised as incredible and essential for rapid research iteration
- •As confidence grows, specialization enables better efficiency per workload
- •Infrastructure rollout is described as a decades-long journey, not a 5-year sprint
- 20:18 – 23:29
Compute growth trajectory and why demand keeps compounding (agents and Codex)
Sam traces OpenAI’s compute scaling from megawatts to gigawatts, arguing that more capacity quickly gets consumed as models improve and costs drop. He uses coding as an example: once tools become more capable (Codex), adoption and demand surge dramatically across industries.
- •OpenAI compute evolution: ~2 MW → 20 → 200 → >2 GW; partnerships aim near ~30 GW
- •Even today’s model quality could saturate far more capacity if costs fell
- •Model improvements + lower token cost create large bursts of “surplus demand”
- •Codex example: better capability and UX turns niche use into rapid growth
- •Vision: extend agentic productivity gains to every knowledge-work domain
- 23:29 – 27:03
Hardware roadmap: leading-edge nodes, multi-die, 3D stacking, and optical switching
Broadcom describes continued semiconductor advances and packaging innovations to keep pushing performance and efficiency. Charlie outlines steps from fitting compute within die limits to multi-die scaling, 3D stacking, and integrating optics for extremely high-bandwidth switching.
- •Continued node progress (e.g., toward and beyond 2nm) to improve efficiency
- •Limits of single-die area (e.g., ~800 mm²) drive multi-die approaches
- •Next steps include stacking (3D integration) to expand compute density
- •Optics integration: ~100 Tb switching with optical capabilities in the same chip
- •Expectation of rapid cluster-level improvements (doubling every 6–12 months, per Charlie)
- 27:03 – 28:49
Delivery timeline, rapid deployment, and the push toward compute abundance
The speakers give a first expected availability window and stress the scale of execution required to deliver a new chip and system at 10-GW deployment levels. They close by connecting the project to OpenAI’s mission—shifting from compute scarcity toward broad accessibility so more people can build and benefit.
- •Initial results expected end of next year; rapid deployment over the following ~3 years
- •Teams coordinate frequently (weekly cadence) and expect silicon back soon
- •Acknowledgment that “10 gigawatts” is hard, end-to-end work—not a slogan
- •Compute scarcity already constrains product rollouts and internal progress
- •Goal: make compute abundant so ideas can be pursued without bottlenecks; wrap-up thanks
