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David Patterson: Computer Architecture and Data Storage | Lex Fridman Podcast #104

David Patterson is a Turing award winner and professor of computer science at Berkeley. He is known for pioneering contributions to RISC processor architecture used by 99% of new chips today and for co-creating RAID storage. The impact that these two lines of research and development have had on our world is immeasurable. He is also one of the great educators of computer science in the world. His book with John Hennessy "Computer Architecture: A Quantitative Approach" is how I first learned about and was humbled by the inner workings of machines at the lowest level. Support this podcast by signing up with these sponsors: - Jordan Harbinger Show: https://jordanharbinger.com/lex/ - Cash App - use code "LexPodcast" and download: - Cash App (App Store): https://apple.co/2sPrUHe - Cash App (Google Play): https://bit.ly/2MlvP5w PODCAST INFO: Podcast website: https://lexfridman.com/podcast Apple Podcasts: https://apple.co/2lwqZIr Spotify: https://spoti.fi/2nEwCF8 RSS: https://lexfridman.com/feed/podcast/ Full episodes playlist: https://www.youtube.com/playlist?list=PLrAXtmErZgOdP_8GztsuKi9nrraNbKKp4 Clips playlist: https://www.youtube.com/playlist?list=PLrAXtmErZgOeciFP3CBCIEElOJeitOr41 OUTLINE: 0:00 - Introduction 3:28 - How have computers changed? 4:22 - What's inside a computer? 10:02 - Layers of abstraction 13:05 - RISC vs CISC computer architectures 28:18 - Designing a good instruction set is an art 31:46 - Measures of performance 36:02 - RISC instruction set 39:39 - RISC-V open standard instruction set architecture 51:12 - Why do ARM implementations vary? 52:57 - Simple is beautiful in instruction set design 58:09 - How machine learning changed computers 1:08:18 - Machine learning benchmarks 1:16:30 - Quantum computing 1:19:41 - Moore's law 1:28:22 - RAID data storage 1:36:53 - Teaching 1:40:59 - Wrestling 1:45:26 - Meaning of life CONNECT: - Subscribe to this YouTube channel - Twitter: https://twitter.com/lexfridman - LinkedIn: https://www.linkedin.com/in/lexfridman - Facebook: https://www.facebook.com/LexFridmanPage - Instagram: https://www.instagram.com/lexfridman - Medium: https://medium.com/@lexfridman - Support on Patreon: https://www.patreon.com/lexfridman

Lex FridmanhostDavid Pattersonguest
Jun 27, 20201h 49mWatch on YouTube ↗

At a glance

WHAT IT’S REALLY ABOUT

From RISC to RISC‑V: Patterson on Computing’s Past and Future

  1. David Patterson discusses the evolution of computer architecture over the past 50 years, focusing on the rise of microprocessors, Moore’s Law, and the RISC vs. CISC debate that reshaped how processors are designed.
  2. He explains instruction sets, layers of abstraction, and why simple, reduced instruction sets (RISC) paired with strong compilers beat more complex designs in performance, power, and scalability.
  3. Patterson introduces RISC‑V as an open, modular instruction set poised to become a hardware analog of Linux, especially in IoT and potentially cloud computing, and ties this to emerging domain‑specific hardware for machine learning.
  4. He also reflects on his RAID work in storage, the slowing of Moore’s Law, the promise and limits of quantum computing, the importance of benchmarks, and how teaching, sports, and relationships shape a meaningful career.

IDEAS WORTH REMEMBERING

5 ideas

Simplicity in instruction sets can outperform complexity when paired with good compilers.

RISC architectures execute more, simpler instructions but at much lower cycles per instruction, yielding large net speedups over complex CISC designs once compilation and hardware efficiency are factored in.

Open instruction sets like RISC‑V can unlock Linux-style innovation in hardware.

By making the ISA specification free and open, RISC‑V enables open-source processor implementations, customization, and broad collaboration, especially attractive for IoT, research, and future domains.

Performance must be measured quantitatively using shared benchmarks, not intuition.

Patterson emphasizes factoring execution time into instructions, cycles per instruction, and clock time, and using agreed benchmark suites (SPEC, MLPerf, ImageNet-style datasets) to fairly compare architectures and systems.

Moore’s Law is slowing, forcing a shift to domain-specific accelerators.

Transistors are no longer doubling every two years, so general-purpose CPUs are improving only marginally; performance gains now come from specialized hardware for key workloads, especially machine learning (e.g., matrix-multiply engines).

Machine learning is both a new programming paradigm and a perfect match for accelerators.

As software moves toward data-driven “Software 2.0,” specialized hardware that accelerates neural-network operations becomes broadly useful across tasks like vision, language, and databases, not just niche applications.

WORDS WORTH SAVING

5 quotes

The brilliance of the processor is that it performs very trivial operations, but it just performs billions of them per second.

David Patterson

It’s actually harder to come up with a simple, elegant solution. The temptation in engineering is to make things more complicated.

David Patterson

We were executing maybe 50% more instructions, but they ran four times faster.

David Patterson

Moore’s Law is slowing down, and that’s going to affect your assumptions.

David Patterson

People don’t die wishing they’d spent more time in the office.

David Patterson

Historical evolution of computers, microprocessors, and Moore’s LawRISC vs. CISC architectures and instruction set designRISC‑V and open-source hardware ecosystemsDomain-specific accelerators and machine learning hardware (e.g., TPUs, GPUs)Storage innovations and the origins and impact of RAIDBenchmarks, metrics, and performance evaluation (SPEC, MLPerf, ImageNet)Slowing of Moore’s Law, quantum computing, and the future of computingTeaching, teamwork, wrestling, and personal philosophy on a life well lived

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