Frontier Chips for Frontier AI Labs, with Walter Goodwin, Founder/CEO of Fractile

ℹ️ EPISODE INFO

Released

October 2, 2026

Duration

35m

Channel

No Priors

Watch on YouTube

▶ Open ↗

📝 EPISODE DESCRIPTION

Founder and CEO of full-stack AI chip company Fractile, Walter Goodwin, joins Sarah Guo to discuss the bets he’s made on the future of the chip market as other major players like Broadcom, NVIDIA, and AMD try to accelerate their workloads. They discuss the difference in Fractile’s newer approach on model architecture with a full-stack team in the current chip landscape and the technical bets they’re making in that direction. Walter also talks about compressing the gap between the chip design cycle and its payoff period, and making a generational leap in AI inference to realize the bet in volume against the value to be captured. Sign up for new podcasts every week. Email feedback to show@no-priors.com Follow us on Twitter: @NoPriorsPod | @Saranormous | @EladGil | @goodwin_ml | @fractile_ai Chapters: 00:46 – Walter Goodwin and Fractile Introduction 02:29 – The Chip Landscape Now 04:56 – Common Handoffs From Architecture-Focused Players 07:18 – Full Stack Approach and Team Setup 09:49 – Fractile’s Most Important Technical Bets 15:32 – Workload Predictions and Compressing the Chip Design Cycle 23:03 – Architect Intent to Output Bottlenecks and Accelerating Trials 28:16 – Workload Bets on Model Architectural Shifts 31:20 – The Future of AI Chip Players and Market Structure 35:14 – Conclusion

🎤 SPEAKERS

• Walter Goodwin

  guest

  Founder & CEO of Fractile, an AI inference chip company.

• Sarah Guo

  host

  Co-host of No Priors and investor focused on AI/technology.

🧾 EPISODE SUMMARY

In this episode of No Priors, featuring Walter Goodwin and Sarah Guo, Frontier Chips for Frontier AI Labs, with Walter Goodwin, Founder/CEO of Fractile explores fractile’s bet: bandwidth-first chips to win fast frontier inference Fractile is building ultra-fast inference chips aimed at serving the largest frontier models, with a central focus on maximizing effective memory bandwidth to accelerate real-time generation and agentic workloads.

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