Former Intel CEO: Why This is the Best Time to Build Hardware

a16z's Raghu Raghuram and Guido Appenzeller sit down with Playground Global General Partner and former Intel CEO Pat Gelsinger to discuss the next wave of semiconductor innovation and the physical constraints shaping the AI buildout. Drawing on his experience designing Intel's 386 and 486 processors, Pat explains how AI could transform chip design, but also why faster design alone won't solve the industry's biggest problems. They examine the bottlenecks in manufacturing, memory bandwidth, advanced packaging, and power, and why today's explosion of specialized AI chips may eventually consolidate around a smaller number of architectures. They also discuss the potential for new memory technologies, the shift from copper to optical networking, and why energy capacity could become a major constraint on AI growth. Finally, they revisit Pat's VMware years to ask what virtualization might look like when infrastructure is built for agents rather than humans. Timestamps: 00:00 - Intro 01:00 - From tech school to Intel at 18 05:44 - The 486 and the birth of modern EDA 07:23 - How AI changes chip design 09:18 - Why silicon still takes nine months 14:49 - Will 100 AI chips converge to a few? 22:08 - Why HBM is a hideous memory 25:15 - How tall can chips get? 42:49 - Energy capacity equals economic capacity 48:42 - A VMware for agents Resources: Follow Pat Gelsinger on X: https://x.com/PGelsinger Follow Raghu Raghuram on X: https://x.com/RaghuRaghuram Follow Guido Appenzeller: https://x.com/appenz Stay Updated: If you enjoyed this episode, be sure to like, subscribe, and share with your friends! Find a16z on X: https://twitter.com/a16z Find a16z on LinkedIn: https://www.linkedin.com/company/a16z Listen to the a16z Show on Spotify: https://open.spotify.com/show/5bC65RDvs3oxnLyqqvkUYX Listen to the a16z Show on Apple Podcasts: https://podcasts.apple.com/us/podcast/a16z-podcast/id842818711 Follow our host: https://x.com/eriktorenberg Please note that the content here is for informational purposes only; should NOT be taken as legal, business, tax, or investment advice or be used to evaluate any investment or security; and is not directed at any investors or potential investors in any a16z fund. a16z and its affiliates may maintain investments in the companies discussed. For more details please see http://a16z.com/disclosures.

Pat GelsingerguestGuido AppenzellerhostRaghu Raghuramhost

Oct 9, 202653mWatch on YouTube ↗

EPISODE INFO

Released: October 9, 2026
Duration: 53m
Channel: a16z
Watch on YouTube: ▶ Open ↗

EPISODE DESCRIPTION

a16z's Raghu Raghuram and Guido Appenzeller sit down with Playground Global General Partner and former Intel CEO Pat Gelsinger to discuss the next wave of semiconductor innovation and the physical constraints shaping the AI buildout. Drawing on his experience designing Intel's 386 and 486 processors, Pat explains how AI could transform chip design, but also why faster design alone won't solve the industry's biggest problems. They examine the bottlenecks in manufacturing, memory bandwidth, advanced packaging, and power, and why today's explosion of specialized AI chips may eventually consolidate around a smaller number of architectures. They also discuss the potential for new memory technologies, the shift from copper to optical networking, and why energy capacity could become a major constraint on AI growth. Finally, they revisit Pat's VMware years to ask what virtualization might look like when infrastructure is built for agents rather than humans. Timestamps: 00:00 - Intro 01:00 - From tech school to Intel at 18 05:44 - The 486 and the birth of modern EDA 07:23 - How AI changes chip design 09:18 - Why silicon still takes nine months 14:49 - Will 100 AI chips converge to a few? 22:08 - Why HBM is a hideous memory 25:15 - How tall can chips get? 42:49 - Energy capacity equals economic capacity 48:42 - A VMware for agents Resources: Follow Pat Gelsinger on X: https://x.com/PGelsinger Follow Raghu Raghuram on X: https://x.com/RaghuRaghuram Follow Guido Appenzeller: https://x.com/appenz Stay Updated: If you enjoyed this episode, be sure to like, subscribe, and share with your friends! Find a16z on X: https://twitter.com/a16z Find a16z on LinkedIn: https://www.linkedin.com/company/a16z Listen to the a16z Show on Spotify: https://open.spotify.com/show/5bC65RDvs3oxnLyqqvkUYX Listen to the a16z Show on Apple Podcasts: https://podcasts.apple.com/us/podcast/a16z-podcast/id842818711 Follow our host: https://x.com/eriktorenberg Please note that the content here is for informational purposes only; should NOT be taken as legal, business, tax, or investment advice or be used to evaluate any investment or security; and is not directed at any investors or potential investors in any a16z fund. a16z and its affiliates may maintain investments in the companies discussed. For more details please see http://a16z.com/disclosures.

SPEAKERS

Pat Gelsinger
guest
Former Intel executive and VMware CEO; technology leader focused on semiconductors, systems, and infrastructure.
Guido Appenzeller
host
a16z partner and systems/networking expert with a Stanford background, hosting technical interviews on infrastructure and hardware.
Raghu Raghuram
host
Former VMware CEO and a16z host who interviews leaders on enterprise infrastructure, virtualization, and hardware systems.

EPISODE SUMMARY

In this episode of a16z, featuring Pat Gelsinger and Guido Appenzeller, Former Intel CEO: Why This is the Best Time to Build Hardware explores aI revives hardware, but power, memory, and manufacturing now bottleneck Pat Gelsinger describes a hardware “renaissance” where AI accelerates chip design, but fabrication, packaging, and rack-scale integration now dominate time-to-value.

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